{"product_id":"ieej-ect10066","title":"電流を再利用した線形電圧電流変換回路","description":"\u003cp\u003e\u003cstrong\u003eカテゴリ: \u003c\/strong\u003e研究会(論文単位)\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003e論文No: \u003c\/strong\u003eECT10066\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003eグループ名: \u003c\/strong\u003e【C】電子・情報・システム部門 電子回路研究会\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003e発行日: \u003c\/strong\u003e2010\/06\/11\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003eタイトル(英語): \u003c\/strong\u003eLinear voltage-to-current converter with current reuse\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003e著者名: \u003c\/strong\u003eニコデムス レディアン(東京工業大学),堀井 大輔(東京工業大学),佐藤 広生(東京工業大学),高木 茂孝(東京工業大学)\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003e著者名(英語): \u003c\/strong\u003eNicodimus Retdian(Tokyo Institute of Technology),Horii Daisuke(Tokyo Institute of Technology),Sato Hiroki(Tokyo Institute of Technology),Takagi Shigetaka(Tokyo Institute of Technology)\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003eキーワード: \u003c\/strong\u003e電圧電流変換回路|電流モード|低電源電圧|Voltage-to-Current Converter|Current Mode|Low Supply Voltage\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003e要約(日本語): \u003c\/strong\u003e本論文では、従来回路で分離した電流を再利用する増幅器の構成を提案する。提案手法を用いることによって、電圧電流変換回路の線形性を劣化させることなく消費電流を削減できる。0.18umCMOSプロセスを用いた設計例では、電圧電流変換回路の線形性を劣化させることなく回路全体の消費電流を削減できる。\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003e要約(英語): \u003c\/strong\u003eThe development of deep sub-micron CMOS process brings a new challengeto analog circuit designers since they have to use lower supply voltage due tolower breakdown voltage of devices. However, unfortunately, the signalthat goes into ICs is determined by industrial standards. Since the amplitude ofthe signal is usually larger than 1 V, it will exceed the supply voltage andtherefore cannot be processed properly. An alternative technique to solvethis problem is use of a voltage-to-current converter at the input of theIC to convert the input signal voltage into a current signal. Since the signal whichcomes into the IC is a current, then it will not suffer from limitation bysupply voltage. This paper proposes a linear voltage-to-current converterwith current reuse technique to reduce the power consumption of the circuitwithout deteriorating its linearity and bandwidth. Simulation results showthat the THD of the proposed circuit for a 2.5-Vp-p input amplitude is less than 1.3m% with a bandwidth of 30MHz under 1.8V single supply voltage. The power consumption to obtainthe same linearity is reduced from 12.1mW to 8.44mW.\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003e原稿種別: \u003c\/strong\u003e日本語\u003c\/p\u003e\u003cp\u003e\u003cstrong\u003ePDFファイルサイズ: \u003c\/strong\u003e568 Kバイト\u003c\/p\u003e","brand":"IEEJ-PDF","offers":[{"title":"PDFダウンロード（一般価格330円\/会員価格220円） \/ A4 \/ 6","offer_id":46362447151343,"sku":"IEEJ-ECT10066-PDF","price":330.0,"currency_code":"JPY","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0718\/9512\/2159\/files\/IEEJ-PDF_61e8c8c1-ab36-4c9f-8d2e-e30841a01852.png?v=1743628079","url":"https:\/\/ieej.bookpark.ne.jp\/products\/ieej-ect10066","provider":"電気学会 電子図書館","version":"1.0","type":"link"}