Output Response Improvement of an HVDC Breaker Test Bench Based on Cascaded H-bridge Cells Using Steady State Velocity Error Compensation
Output Response Improvement of an HVDC Breaker Test Bench Based on Cascaded H-bridge Cells Using Steady State Velocity Error Compensation
カテゴリ: 研究会(論文単位)
論文No: SPC21060,MD21060
グループ名: 【D】産業応用部門 半導体電力変換/【D】産業応用部門 モータドライブ合同研究会
発行日: 2021/01/18
タイトル(英語): Output Response Improvement of an HVDC Breaker Test Bench Based on Cascaded H-bridge Cells Using Steady State Velocity Error Compensation
著者名: クルネタ ニコラ(東京工業大学),萩原 誠(東京工業大学)
著者名(英語): Nikola Krneta(Tokyo Institute of Technology),Makoto Hagiwara(Tokyo Institute of Technology)
キーワード: HVDC circuit breaker|steady-state velocity error|test bench
要約(日本語): PI control of a system is easily implemented and provides good reference tracking. However, depending on the reference, steady state errors may occur in the output. These errors cause delays in operation and unwanted oscillations in the output signal. By
要約(英語): PI control of a system is easily implemented and provides good reference tracking. However, depending on the reference, steady state errors may occur in the output. These errors cause delays in operation and unwanted oscillations in the output signal. By mitigating steady state errors in the output, overall performance of the test bench can be improved.
本誌: 2021年1月22日半導体電力変換/モータドライブ合同研究会
本誌掲載ページ: 91-96 p
原稿種別: 英語
PDFファイルサイズ: 1,188 Kバイト
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