Study on Speed-Enhancement Techniques for Cyclic ADCs Using Dynamic Amplifiers
Study on Speed-Enhancement Techniques for Cyclic ADCs Using Dynamic Amplifiers
カテゴリ:研究会(論文単位)
論文No:ECT25041
グループ名:【C】電子・情報・システム部門 電子回路研究会
発行日:2025/9/1
タイトル(英語):Study on Speed-Enhancement Techniques for Cyclic ADCs Using Dynamic Amplifiers
著者名:中村 駿太(東京都市大学),傘 昊(東京都市大学)
著者名(英語): Shunta Nakamura(Tokyo City University),Hao San(Tokyo City University)
キーワード:cyclic ADC,FIA
要約(日本語):This paper presents a high-speed low-voltage cyclic ADC utilizing dynamic amplifiers. The proposed architecture inherently avoids stability issues without requiring explicit phase compensation circuits, thereby enhancing the bandwidth by 30× compared to conventional amplifier. Transistor-level SPICE simulations in 65nm CMOS demonstrate that a 1.1MS/s cyclic ADC achieving 13.38-bit ENOB while the power supply voltage is vdd = 0.7V,.
要約(英語):This paper presents a high-speed low-voltage cyclic ADC utilizing dynamic amplifiers. The proposed architecture inherently avoids stability issues without requiring explicit phase compensation circuits, thereby enhancing the bandwidth by 30× compared to conventional amplifier. Transistor-level SPICE simulations in 65nm CMOS demonstrate that a 1.1MS/s cyclic ADC achieving 13.38-bit ENOB while the power supply voltage is vdd = 0.7V,.
本誌掲載ページ:11-13p
原稿種別:英語
PDFファイルサイズ:291Kバイト
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