Feasibility study of a non-binary cyclic ADC employing performance-relaxed amplifiers

カテゴリ：研究会(論文単位)

論文No：ECT25051

グループ名：【C】電子・情報・システム部門 電子回路研究会

発行日：2025/9/1

タイトル(英語)：Feasibility study of a non-binary cyclic ADC employing performance-relaxed amplifiers

著者名：森下 裕介(東京都市大学),傘 昊(東京都市大学)

著者名(英語)： Yusuke Morishita(Tokyo City University),Hao San(Tokyo City University)

キーワード：Cyclic ADC,Amplifier

要約(日本語)：Small-area ADCs provide an analog-to-digital interface for mixed-signal SoCs embedded in IoT sensors. The compact size and high resolution of cyclic ADCs make them well-suited for IoT sensor applications. Conventional cyclic ADCs require high-gain amplifiers to achieve high-accuracy analog signal processing. However, implementing low-voltage, high-gain amplifiers is fundamentally challenging in deep-submicron/nanoscale CMOS technologies. This study proposes a non-binary cyclic ADC technique using a low-gain amplifier. The feasibility of the proposed architecture and its implementation scheme are verified through SPICE simulations.

要約(英語)：Small-area ADCs provide an analog-to-digital interface for mixed-signal SoCs embedded in IoT sensors. The compact size and high resolution of cyclic ADCs make them well-suited for IoT sensor applications. Conventional cyclic ADCs require high-gain amplifiers to achieve high-accuracy analog signal processing. However, implementing low-voltage, high-gain amplifiers is fundamentally challenging in deep-submicron/nanoscale CMOS technologies. This study proposes a non-binary cyclic ADC technique using a low-gain amplifier. The feasibility of the proposed architecture and its implementation scheme are verified through SPICE simulations.

本誌：2025年9月4日電子回路研究会

本誌掲載ページ：47-49p

原稿種別：英語

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