Low-power SEAL-RF adiabatic logic circuit with DC bias power supply

カテゴリ：国際会議

論文No：A1

グループ名：【C】AVIC2025

発行日：2025/10/20

著者名：Marina Shibata (Gifu University), Yasuhiro Takahashi (Gifu University)

キーワード：Adiabatic Logic Circuit,Energy Efficient Devices,Low power dissipation,DC power supply

要約(英語)：In this work, we propose a circuit configuration that incorporates a DC bias power supply into a SEAL-RF adiabatic logic circuit. The proposed circuit prevents complete discharge of the output node by maintaining it at a voltage of 0.2 V–0.3 V, thereby suppressing energy loss during discharge. In addition, the remaining charge at the output node contributes to reducing the energy required for recharging in the next clock cycle. As a result, the proposed circuit demonstrates superior power efficiency compared with conventional configurations, especially, it is effective in AND/NAND, XOR/XNOR, and BUFF/INV configurations. Simulation results show that a 65.6% reduction in energy consumption was achieved compared to a conventional SEAL-RF circuit when 100 logic circuits are connected in an AND/NAND configuration.

本誌掲載ページ：1-4p

原稿種別：英語

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