A high-gain 25-Gb/s active voltage current feedback transimpedance amplifier in 65-nm CMOS

カテゴリ：国際会議

論文No：B4

グループ名：【C】AVIC2025

発行日：2025/10/20

著者名：Yudai Taki (Gifu University), Yasuhuiro Takahashi (Gifu University)

キーワード：Transimpedance amplifier,Optical communication,TIA,AVCF

要約(英語)：This paper proposes a 25 Gbps, 0.81 pJ/bit inverterbased Transimpedance Amplifier (TIA) circuit built upon the active voltage-current feedback TIA (AVCF-TIA) architecture. The analysis software is Virtuoso, and the transistors are 65 nm CMOS. Compared to conventional circuits, the proposed TIA circuit exhibits improved gain performance, which is simplified the post amplifier design and contributes to achieving both operational stability and power efficiency. From post-layout simulations, the proposed TIA circuit is confirmed to deliver a transimpedance gain of 75.7 dBOmega and maintain a bandwidth of 20.8 GHz. The proposed TIA circuit operates at a 1.0 V supply voltage with a power consumption of 20.3 mW (=20.3 mA x 1.0 V). The overall layout, including I/O and DC pads, measures 670 um x 580 μm (=0.39 mm2). The core proposed TIA circuit occupies also an area of 450 um x 176 um (=0.079 mm2) within this footprint.

本誌掲載ページ：37-40p

原稿種別：英語

PDFファイルサイズ：1,761Kバイト