多回線直流送電における低速直流遮断器の適用可能性の検討 ―制限電圧の緩和によるアレスタ消費エネルギーの低減―
多回線直流送電における低速直流遮断器の適用可能性の検討 ―制限電圧の緩和によるアレスタ消費エネルギーの低減―
カテゴリ: 部門大会
論文No: 8
グループ名: 【B】令和6年電気学会電力・エネルギー部門大会
発行日: 2024/08/23
タイトル(英語): Applicability of Low-speed DC Circuit Breakers for Multi-circuit HVDC Transmission --- Reduction of Arrester Consumption Energy by Mitigating the Voltage Rating ---
著者名: 若月圭眞(東京工業大学),佐野憲一朗(東京工業大学)
著者名(英語): Keima Wakatsuki (Tokyo Institute of Technology), Kenichiro Sano (Tokyo Institute of Technology)
キーワード: 多回線直流送電|直流事故|事故時運転継続|機械式直流遮断器|アレスタ|multi circuit HVDC transmission|DC fault|fault ride through (FRT)|mechanical DC circuit breaker|arrester
要約(日本語): Multi-circuit HVDC transmission systems have the advantage of achieving continuous operation after DC faults even with low-speed DC circuit breakers. However, there was a problem of excessive energy consumption of arresters used for overvoltage suppression. This paper proposes a design approach to mitigate the rated voltage of the arresters as a solution. The effectiveness of this approach is verified through simulation. Assuming acceptance of temporary overvoltage (TOV) equivalent to that in AC systems, the proposed approach can reduce the energy consumption of the arresters to 40% of the conventional design. The approach also shows effectiveness in lowering the overload requirements for diodes in onshore converters and the maximum interruption current requirements for DC circuit breakers.
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