Conceptual Design of Hardware Acceleration Circuit for GPS Signal Correlation Processing

カテゴリ: 部門大会

論文No: MC1-8

グループ名: 【C】2023年電気学会電子・情報・システム部門大会

発行日: 2023/08/23

タイトル(英語): Conceptual Design of Hardware Acceleration Circuit for GPS Signal Correlation Processing

著者名: Wang Chenxu（室蘭工業大学）,川口 秀樹（室蘭工業大学）,久保 信明（東京海洋大学）

著者名(英語): Chenxu Wang (Muroran Institute of Technology),Hideki Kawaguchi (Muroran Institute of Technology),Nobuaki Kubo (Tokyo University of Marine Science and Technology)

キーワード: GPS|専用計算機|自己相関関数|VHDL|FPGA|GPS|Dedicated Computer|auto-correlation function|VHDL|FPGA

要約(日本語): The GPS is now widely employed not only in high level technologies but also in daily life tools such as car navigation and so on. Then, since the GPS signal from GPS satellite attenuate to extremely weak intensity on the ground, high level signal processing such as spread spectrum communication is employed for obtaining positioning information from the GPS signal and complicated information processing is required at the GPS receiver. Accordingly, it takes several milli-seconds for finding absolute position, which is not suitable for high speed applications such as independent control robots or drones. In this work, a conceptual design of dedicated hardware circuits for GPS signal information processing is considered to aim to effectively speed up the positioning information processing.