（招待講演）バンプレスTSV配線を用いたテラスケール三次元集積技術

カテゴリ: 部門大会

論文No: MC5-4

グループ名: 【C】平成25年電気学会電子・情報・システム部門大会講演論文集

発行日: 2013/09/04

タイトル(英語): （Invited lecture) Tera-Scale Three-Dimensional Integration (3DI) using Bumpless TSV Interconnects

著者名: 大場 隆之(東京工業大学),藤本 興治(東京工業大学),前田 展秀(東京工業大学),北田 秀樹(東京工業大学),水島 賢子(東京工業大学),児玉 祥一(東京工業大学),Young Suk Kim (東京工業大学)

著者名(英語): Takayuki Ohba(Tokyo Institute of Technology),Koji Fujimoto(Tokyo Institute of Technology),Nobuhide Maeda(Tokyo Institute of Technology),Hideki Kitada(Tokyo Institute of Technology),Yoriko Mizushima(Tokyo Institute of Technology),Shoichi Kodama(Tokyo Institute of Technology),Young Suk Kim (Tokyo Institute of Technology)

キーワード: 三次元集積|バンプレス配線|3DI|Bumpless interconnects

要約(日本語): Bumpless interconnects prospected to the Tera-byte large scale integration using three-dimensional (3D) processes has been discussed. The key feature of bumpless as well as no bump interconnects is a second-generation alternative to the use of micro-bump for Wafer-on-Wafer (WOW). In our 3D interconnects technology is classified into Via-Last from the front side and stacking Back-to-Front in which any number of thinned 300 mm wafers realizing further large-scale devices with low cost rather than the use of extreme ultraviolet (EUV) lithography. The WOW is the leading-edge process among 3D processes because stacking at the wafer level drastically increases the processing throughput and bumpless interconnects provide an appropriate yield using existing technology.

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