Thermal Analysis with Varying Physical Parameters in 3D ICs

カテゴリ: 部門大会

論文No: SS7-9

グループ名: 【C】平成27年電気学会電子・情報・システム部門大会講演論文集

発行日: 2015/08/27

タイトル(英語): Thermal Analysis with Varying Physical Parameters in 3D ICs

著者名: Kaoru Furumi(Hirosaki University),Masaaki Fukase(Hirosaki University),Masashi Imai(Hirosaki University),Yuuki Miura(Hirosaki University),Nanako Niioka(Hirosaki University),Atsushi Kurokawa(Hirosaki University)

著者名(英語): Kaoru Furumi(Hirosaki University),Masaaki Fukase(Hirosaki University),Masashi Imai(Hirosaki University),Yuuki Miura(Hirosaki University),Nanako Niioka(Hirosaki University),Atsushi Kurokawa(Hirosaki University)

キーワード: 三次元集積回路|貫通シリコンビア|熱解析熱解析|3D IC|through silicon via|thermal analysis

要約(日本語): Three-dimensional integrated circuits (3D ICs) lead to higher power densities than 2D ICs because of the stacking of multiple device layers. In this paper, we present several useful results obtained by thermal analysis with varying physical parameters of through-silicon-via (TSV) based 3D ICs. The analysis takes into account the effects of a heat sink, package, and printed circuit board on temperature. The factors that the results clarify include 1) the limitation of power dissipation, 2) the impact of the number of stacked chips, 3) the temperature reducing effects of TSVs and thermal interface material, 4) the lateral heat radiation effect, 5) the effects of the position of high/low power density chips, and 6) the impact of each layer under the bottom chip.

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