積層方式Chain構造PRAMの設計法

カテゴリ: 論文誌(論文単位)

グループ名: 【C】電子・情報・システム部門

発行日: 2013/05/01

タイトル(英語): Design Technology of Stacked Type Chain PRAM

著者名: 加藤　翔（湘南工科大学工学部情報工学科），渡辺　重佳（湘南工科大学工学部情報工学科）

著者名(英語): Sho Kato (Department of Information Science, Shonan Institute of Technology), Shigeyoshi Watanabe (Department of Information Science, Shonan Institute of Technology)

キーワード: 不揮発性メモリ，PRAM，相変化素子，chain構造，積層構造メモリ　　Non-volatile memory，PRAM，phase change material，chain structure，Stacked memory

要約(英語): A stacked type chain PRAM which enables to realize lower cost than flash memory has been proposed. The newly proposed memory cell is consisted with a PCM for data storage and a MOS transistor connected in parallel. This memory cell is connected in series for realizing the chain structure. Cell structure, the design method for realizing stable read and write operation, and core circuit for the stacked type chain PRAM have been described. Newly proposed memory cell has been designed to adopt BiCS (Bit Cost Scalable) process technology for realizing low-cost memory. The design of the resistance of PCM and the pass transistor is key issue for realizing stable operation. For designing the row decoder, the circuit concept of the stacked FeRAM with the NAND structure cell has been successfully adopted with SGT. The newly proposed stacked type chain PRAM is a promising candidate for realizing high-speed and low-power future non-volatile semiconductor memory.

本誌: 電気学会論文誌C（電子・情報・システム部門誌） Vol.133 No.5 （2013） 特集：新たな産業への応用が進む無線通信技術

本誌掲載ページ: 937-946 p

原稿種別: 論文／日本語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejeiss/133/5/133_937/_article/-char/ja/