A Glitch-Free Time-to-Digital Converter Architecture Based on Gray Code

カテゴリ: 論文誌(論文単位)

グループ名: 【C】電子・情報・システム部門

発行日: 2016/01/01

タイトル(英語): A Glitch-Free Time-to-Digital Converter Architecture Based on Gray Code

著者名: Congbing Li (Division of Electronics and Informatics, Gunma University), Haruo Kobayashi (Division of Electronics and Informatics, Gunma University)

著者名(英語): Congbing Li (Division of Electronics and Informatics, Gunma University), Haruo Kobayashi (Division of Electronics and Informatics, Gunma University)

キーワード: Timing Measurement，Time to Digital Converter，Gray Code，Glitch Free，FPGA

要約(英語): A glitch-free time-to-digital converter (TDC) based on Gray code is presented. This architecture can reduce hardware, power consumption, as well as chip area significantly compared to a flash type TDC, while keeping comparable performance and glitch-free characteristics. Its proof-of-concept prototype was implemented on FPGA, and the simulation and measurement results validate the effectiveness of the proposed architecture.

本誌: 電気学会論文誌C（電子・情報・システム部門誌） Vol.136 No.1 （2016） 特集：電子回路関連技術

本誌掲載ページ: 22-27 p

原稿種別: 論文／英語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejeiss/136/1/136_22/_article/-char/ja/