Gap Junctionモデルを用いたハードウェアカオスニューラルネットワーク

カテゴリ: 論文誌(論文単位)

グループ名: 【C】電子・情報・システム部門

発行日: 2024/07/01

タイトル(英語): A Hardware Chaotic Neural Network with Gap Junction Models

著者名: 山口　拓人（日本大学大学院理工学研究科博士後期電子工学専攻），佐伯　勝敏（日本大学理工学部電子工学科）

著者名(英語): Takuto Yamaguchi (Postdoctoral Course in Electronic Engineering, Graduate School of Science and Engineering, Nihon University), Katsutoshi Saeki (Electronic Engineering, Science and Technology, Nihon University)

キーワード: パルス形ハードウェアカオスニューロンモデル，ニューラルネットワーク，Gap Junction，STDP，シナプス結合，カオス　　pulse-type hardware chaos neuron model，neural network，Gap Junction，STDP，synaptic connection，chaos

要約(英語): We aim at engineering applications of reservoir computing using hardware chaotic neural networks, including associative memory recall. The reservoir layer used in reservoir computing is networked and constructed using Pulse-type Hardware Chaos Neuron Models (P-HCNM). The structure of the reservoir layer is simple, which is advantageous for hardware implementation. By inducing chaos in the reservoir layer, it is possible to use the "chaotic edge" where the reservoir reaches its highest efficiency. It has also been reported that incorporating self-correction within the reservoir layer increases the efficiency of the task.In this paper, we constructed a hardware small-world neural network using a synaptic model with spike timing-dependent synaptic plasticity (STDP) and a Gap Junction model. As a result, it is clarified that all cell body models with synaptic model connections show chaotic firing by simulation at the same time, and that the STDP model enables learning while keeping the chaotic phenomena. In addition, comparison with the firing of cell body models coupled only with synaptic models suggested that the Gap Junction model works significantly in inducing chaos in neural networks.

本誌: 電気学会論文誌C（電子・情報・システム部門誌） Vol.144 No.7 （2024） 特集：2023年電子・情報・システム部門大会

本誌掲載ページ: 580-587 p

原稿種別: 論文／日本語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejeiss/144/7/144_580/_article/-char/ja/