演算時間遅れのあるディジタル制御系での限定極配置法による制御パラメータ算出について
演算時間遅れのあるディジタル制御系での限定極配置法による制御パラメータ算出について
カテゴリ: 論文誌(論文単位)
グループ名: 【D】産業応用部門
発行日: 2013/03/01
タイトル(英語): Parameter Design for a Digital Control System with Calculation Delay Using a Limited Pole Placement Method
著者名: 浦川 禎之(ソニー(株)コアデバイス開発本部)
著者名(英語): Yoshiyuki Urakawa (Core Device Development Group, Sony Corporation)
キーワード: ディジタル制御,むだ時間,PID制御,位相進み補償,制御パラメータ,限定極配置法 digital control,delay,PID control,phase-lead compensation,control parameters,limited pole placement method
要約(英語): Digital controllers are applied to various systems owing to their precision in realizing high-order controllers. However, they must consider calculation delay; the phase lag due to this delay degrades the performance of the control system. Controllers with a fixed structure, such as PID controllers, are generally used in practice, but the influence of calculation delays on them is not obvious. For example, it is difficult to derive parameters that maximize the performance of control systems with calculation delay, making it necessary to tune the parameters of the controllers by trial and error. Therefore, this paper proposes a limited pole placement (LPP) method to calculate the parameters for controllers having fixed structures and with calculation delay. In this study, the parameters that suppress the vibration due to phase lag are derived, and the performance of the control system is maximized by analyzing the location of the determined poles. The optimal parameters for fixed controllers with delay using the LPP method are determined efficiently.
本誌: 電気学会論文誌D(産業応用部門誌) Vol.133 No.3 (2013) 特集:産業計測制御全般
本誌掲載ページ: 272-281 p
原稿種別: 論文/日本語
電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejias/133/3/133_272/_article/-char/ja/
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