High-Speed Analysis of Bus Bar Inductance for a Laminated Structure

カテゴリ: 論文誌(論文単位)

グループ名: 【D】産業応用部門（英文）

発行日: 2013/07/01

タイトル(英語): High-Speed Analysis of Bus Bar Inductance for a Laminated Structure

著者名: Keiji Wada (Tokyo Metropolitan University), Akihiro Hino (Tokyo Metropolitan University), Masato Ando (Tokyo Metropolitan University)

著者名(英語): Keiji Wada (Tokyo Metropolitan University), Akihiro Hino (Tokyo Metropolitan University), Masato Ando (Tokyo Metropolitan University)

キーワード: bus bar，inductance map，laminated structure，stray inductance

要約(英語): In power converter circuits, the stray inductance of a bus bar between a DC capacitor and power devices may affect overvoltage and influence the switching losses under high-speed switching operation. Therefore, it is necessary to design the wiring structure by considering the stray inductance of the bus bar.The authors have proposed an inductance map, which depicts the relationship between the wiring structure and the stray inductance. The inductance map is useful for an initial design of the circuit structure. This paper proposes two high-speed analysis methods for drawing the inductance map of the laminated bus bar structure. These methods are based on the symmetric bus bar structure and searching method of specific inductance. As a result, the computation speed of the proposed method is more than ten times higher than that of the conventional method. In addition, the experimental results rated at 500V and 70A for a buck chopper circuit using SiC-MOSFET and SiC-SBD confirm the usefulness of the design procedure.

本誌: IEEJ Journal of Industry Applications Vol.2 No.4 （2013） Special Issue on Power Electronics

本誌掲載ページ: 189-194 p

原稿種別: 論文／英語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejjia/2/4/2_189/_article/-char/ja/