Short-Circuit Protection Method Based on a Gate Charge Characteristic

カテゴリ: 論文誌(論文単位)

グループ名: 【D】産業応用部門（英文）

発行日: 2015/07/01

タイトル(英語): Short-Circuit Protection Method Based on a Gate Charge Characteristic

著者名: Takeshi Horiguchi (Advanced Technology R&D Center, Mitsubishi Electric Corporation), Shin-ichi Kinouchi (Advanced Technology R&D Center, Mitsubishi Electric Corporation), Yasushi Nakayama (Advanced Technology R&D Center, Mitsubishi Electric Corporation),

著者名(英語): Takeshi Horiguchi (Advanced Technology R&D Center, Mitsubishi Electric Corporation), Shin-ichi Kinouchi (Advanced Technology R&D Center, Mitsubishi Electric Corporation), Yasushi Nakayama (Advanced Technology R&D Center, Mitsubishi Electric Corporation), Takeshi Oi (Advanced Technology R&D Center, Mitsubishi Electric Corporation), Hiroaki Urushibata (Department of Electrical and Electronic Engineering, Kanazawa Institute of Technology), Shoji Okamoto (Engineering Division, JGC Corporation), Shinji Tominaga (Department of Electrical and Electronic Engineering, Tokyo Institute of Technology), Hirofumi Akagi (Department of Electrical and Electronic Engineering, Tokyo Institute of Technology)

キーワード: fault under load，hard-switching fault，insulated-gate bipolar transistor，protection

要約(英語): This paper describes a high-speed protection circuit against a hard-switching fault (HSF) and a fault under load (FUL). The demand for high-speed protection circuits for insulated-gate bipolar transistors (IGBTs) subjected to an HSF increases with increasing power density of power semiconductor devices. The reverse transfer capacitance of an IGBT depends on the collector-emitter voltage, such that it produces a significant effect on the switching behavior under HSF conditions as well as under normal conditions. Accordingly, a significant difference appears in the gate charge characteristics between under HSF conditions and under normal turn-on conditions. Hence, an HSF can be detected by monitoring the gate-emitter voltage and the amount of gate charge. IGBTs can be rapidly protected from destruction because no blanking time is required. An FUL can be also detected by the same protection procedure because a gate charge characteristic under FUL conditions also differs from that under normal turn-on conditions. Simulated and experimental results verify the validity of the novel protection circuit based on a gate charge characteristic.

本誌: IEEJ Journal of Industry Applications Vol.4 No.4 （2015） Special Issue on IPEC-Hiroshima

本誌掲載ページ: 360-369 p

原稿種別: 論文／英語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejjia/4/4/4_360/_article/-char/ja/