LC直列回路方式セル電圧均等化回路の擬似乱数列を用いた均等化時間低減法

カテゴリ: 論文誌(論文単位)

グループ名: 【D】産業応用部門

発行日: 2015/09/01

タイトル(英語): An Equalization Time Reduction Method Using a Pseudo-Random Number Sequence for a Cell Voltage Equalization Circuit with an LC Series Circuit

著者名: 佐藤　大記（東京理科大学大学院理工学研究科），星　伸一（東京理科大学理工学部）

著者名(英語): Daiki Satou (Graduate School of Science & Technology, Tokyo University of Science), Nobukazu Hoshi (Faculty of Science & Technology, Tokyo University of Science)

キーワード: 均等化時間低減法，擬似乱数列，セル電圧均等化回路，LC直列回路，電気二重層キャパシタ　　equalization time reduction method，pseudo-random number sequence，cell voltage equalization circuit，LC series circuit，electric double-layer capacitor

要約(英語): When the cells of energy-storage devices such as electric double-layer capacitors (EDLCs) are connected in series, it results in voltage imbalance in each cell because of the nonuniform properties of the individual cells. In a previous research, the authors proposed a novel cell voltage equalization circuit using an LC series circuit, and they examined the effectiveness of this circuit. However, the characteristics of the cell voltage equalization operation depend on each cell voltage difference. Therefore, the proposed circuit has a disadvantage that the equalization time tends to be longer than other cell voltage equalization circuits with a boosting circuit. This paper proposes an equalization time reduction method that uses a pseudo-random number sequence generated by the linear congruential generators. The proposed method can reduce the average equalization time without adding any other active or passive elements. The effectiveness of the proposed method is verified through the experimental results. According to the experimental results, the proposed equalization time reduction method reduces the equalization time to 86.5% of the conventional method.

本誌: 電気学会論文誌D（産業応用部門誌） Vol.135 No.9 （2015） 特集：自動車の電動化技術

本誌掲載ページ: 906-913 p

原稿種別: 論文／日本語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejias/135/9/135_906/_article/-char/ja/