A Novel Load Regulation Technique for Power-SoC with Parallel-Connected POLs

カテゴリ: 論文誌(論文単位)

グループ名: 【D】産業応用部門（英文）

発行日: 2015/11/01

タイトル(英語): A Novel Load Regulation Technique for Power-SoC with Parallel-Connected POLs

著者名: Seiya Abe (Kyushu Institute of Technology), Satoshi Matsumoto (Kyushu Institute of Technology), Tamotsu Ninomiya (City of Kitakyushu, New Industry Promotion Division)

著者名(英語): Seiya Abe (Kyushu Institute of Technology), Satoshi Matsumoto (Kyushu Institute of Technology), Tamotsu Ninomiya (City of Kitakyushu, New Industry Promotion Division)

キーワード: POL，Power-Soc，parallel connection

要約(英語): This paper presents a novel load regulation technique for parallel-connected POLs which reads for power supply on chip (power-SoC). In power-SoCs, many POLs are implemented on the same chip. In this case, the conventional loop control (feedback control) may have problems such as oscillation. The proposed strategy regulates the output voltage by changing the number of working POLs under fixed duty ratio. The parallely connected POL system is implemented using MATLAB/Simulink, and the operating characteristics are confirmed. In addition, the proposed control strategy is also verified experimentally.

本誌: IEEJ Journal of Industry Applications Vol.4 No.6 （2015）

本誌掲載ページ: 732-737 p

原稿種別: 論文／英語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejjia/4/6/4_732/_article/-char/ja/