Superjunction-MOSFETを用いた準Zソースインバータの損失解析

カテゴリ: 論文誌(論文単位)

グループ名: 【D】産業応用部門

発行日: 2018/05/01

タイトル(英語): Loss Analysis of Quasi Z-source Inverter with Superjunction-MOSFET

著者名: 鴨志田　直樹（筑波大学 数理物質科学研究科），飯嶋　竜司（筑波大学 数理物質科学研究科），磯部　高範（筑波大学 数理物質科学研究科），只野　博（筑波大学 数理物質科学研究科）

著者名(英語): Naoki Kamoshida (Graduate School of Pure and Applied Sciences, University of Tsukuba), Ryuji Iijima (Graduate School of Pure and Applied Sciences, University of Tsukuba), Takanori Isobe (Graduate School of Pure and Applied Sciences, University of Tsukuba)

キーワード: Zソースインバータ，上下短絡，Superjunction-MOSFET，損失解析　　Z-source inverter，short-through，Superjunction-MOSFET，loss analysis

要約(英語): A Z-source inverter (ZSI) can work as an inverter with boost capability in one stage by using its impedance-source and the short-through mode as the switching mode. This paper discusses the circuit losses that depend on the boost ratio between the quasi ZSI, which is one of the ZSI topologies, using SJ-MOSFETs and the conventional inverter with a boost chopper using IGBTs. 2-kW class three phase inverter systems for an AC output of 200V were fabricated using the proposed method and the conventional method, and the losses for each component were analyzed experimentally. Experimental results confirmed that the proposed method can reduce the total loss in low boost ratio operations, in comparison with the conventional method, due to its reduced inverter conduction loss.

本誌: 電気学会論文誌D（産業応用部門誌） Vol.138 No.5 （2018） 特集：平成29年産業応用部門大会

本誌掲載ページ: 463-470 p

原稿種別: 論文／日本語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejias/138/5/138_463/_article/-char/ja/