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Dynamic and Steady-State Behavior of Distributed Power Supply in DC Architecture with Minimized DC Bus Capacitor

Dynamic and Steady-State Behavior of Distributed Power Supply in DC Architecture with Minimized DC Bus Capacitor

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カテゴリ: 論文誌(論文単位)

グループ名: 【D】産業応用部門(英文)

発行日: 2023/07/01

タイトル(英語): Dynamic and Steady-State Behavior of Distributed Power Supply in DC Architecture with Minimized DC Bus Capacitor

著者名: Uthen Kamnarn (Department of Electrical Engineering, Rajamangala University of Technology Lanna), Anon Namin (Department of Electrical Engineering, Rajamangala University of Technology Lanna), Pakawadee Wutthiwai (Department of Electrical Engineering, Raj

著者名(英語): Uthen Kamnarn (Department of Electrical Engineering, Rajamangala University of Technology Lanna), Anon Namin (Department of Electrical Engineering, Rajamangala University of Technology Lanna), Pakawadee Wutthiwai (Department of Electrical Engineering, Rajamangala University of Technology Lanna), Jedsada Yodwong (Mu Space and Advanced Technology Company Limited), Phatiphat Thounthong (Renewable Energy Research Centre (RERC), Department of Teacher Training in Electrical Engineering, Faculty of Technical Education, King Mongkut's University of Technology North Bangkok), Noureddine Takorabet (Groupe de Recherche en Energie Electrique de Nancy, Universite de Lorraine)

キーワード: DC architecture,minimized DC bus capacitor,distributed power supply and power module

要約(英語): The dynamic and steady-state behaviors of distributed power supply in a DC architecture with a minimized DC bus capacitor is investigated in this paper using the power balance control technique. The circuit is simulated and analyzed using MATLAB Simulink. The proposed system significantly improves the dynamic response of the converter to load steps with the minimized DC bus capacitor for a distributed Power System. The possibility of using a ratio of capacitance/watt lower than the typical values used in commercial applications, while maintaining the output voltage regulation, is theoretically proved. The minimized DC bus capacitors of the proposed system are 100μF (0.1μF/W), 400μF (0.47μF/W), 80μF (0.53μF/W), 100μF (0.67μF/W), 2000μF (5μF/W) and 2000μF (5μF/W) for the 380Vdc, 100Vdc, 60Vdc, 48Vdc, 24Vdc, and 12Vdc, respectively. The simulation results show the following advantages: small capacitor size, reduced converter volume, good steady-state behavior, and fast dynamic transient response.

本誌: IEEJ Journal of Industry Applications Vol.12 No.4 (2023) Special Issue on “IPEC-Himeji 2022”

本誌掲載ページ: 745-754 p

原稿種別: 論文/英語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejjia/12/4/12_22008110/_article/-char/ja/

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