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Over 99.7% Efficiency at 100kW DC-DC Power Conversion using a 3.3kV SiC Device and Discussion on Device dv/dt Estimation

Over 99.7% Efficiency at 100kW DC-DC Power Conversion using a 3.3kV SiC Device and Discussion on Device dv/dt Estimation

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カテゴリ: 論文誌(論文単位)

グループ名: 【D】産業応用部門(英文)

発行日: 2024/07/01

タイトル(英語): Over 99.7% Efficiency at 100kW DC-DC Power Conversion using a 3.3kV SiC Device and Discussion on Device dv/dt Estimation

著者名: Atsuo Kawamura (The Electrical and Computer Engineering, Yokohama National University), Yukinori Tsuruta (The Electrical and Computer Engineering, Yokohama National University), Hidemine Obara (The Electrical and Computer Engineering, Yokohama National Un

著者名(英語): Atsuo Kawamura (The Electrical and Computer Engineering, Yokohama National University), Yukinori Tsuruta (The Electrical and Computer Engineering, Yokohama National University), Hidemine Obara (The Electrical and Computer Engineering, Yokohama National University)

キーワード: DC-DC power conversion,efficiency,efficiency measurement,SiC

要約(英語): This paper is a re-evaluation of a completed project (High Efficiency Demonstration Grant Using High Voltage SiC Device) from the perspective of accurate efficiency measurement; additionally, this paper discusses on device dv/dt estimation. A topology called the high-efficiency energy conversion system (HEECS), which is one variety of partial boost circuit topologies, is introduced to achieve efficiency over 99.5%. The topology exhibits a very high efficiency for applications in which the output voltage variation is within a certain ratio of the rated output voltage. This paper summarizes the basic features of the topology and theoretically derives the principle of high-efficiency realization. The high efficiency is measured by the back-to-back (BTB) connection of two converters, and the efficiency and accuracy on this method are theoretically derived and confirmed using the measured data of 3.3kV output voltage at 100kW output. The theoretical estimation of dv/dt for a 3.3kV SiC device to reduce dual-active-bridge (DAB) soft-switching loss is discussed. Furthermore, a trend of DC-DC conversion efficiency is shown, and we show that the partial boost topology is a promising approach for achieving high efficiency dc-dc conversion.

本誌: IEEJ Journal of Industry Applications Vol.13 No.4 (2024) Special Issue on “JIASC 2023”

本誌掲載ページ: 426-436 p

原稿種別: 論文/英語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejjia/13/4/13_23013265/_article/-char/ja/

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