Fundamental Analysis in Parallel-Connected Buck Converters containing Time Delay

カテゴリ: 全国大会

論文No: 1-026

グループ名: 【全国大会】平成22年電気学会全国大会論文集

発行日: 2010/03/05

タイトル(英語): Fundamental Analysis in Parallel-Connected Buck Converters containing Time Delay

著者名: 麻原 寛之(大分大学),高坂 拓司(大分大学)

著者名(英語): Hiroyuki Asahara(Oita University),Takuji Kousaka(Oita University)

要約(日本語): Circuit theory in DC/DC converters have been developing under the assumption of the theoretical switching action. On the other hand, missed switching often influences into the qualitative property in such kinds of circuit. We also have studied a simplest class of an interrupted circuit containing missed switching. However, dynamical effect of missed switching in a high dimensional DC/DC converter is not investigated at all. This paper presents the fundamental property in a parallel-connected buck converters containing time delay based on the Poincar\'{e} map.

原稿種別: 日本語

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