FPGAを用いた超高速PMSM駆動システムによる効率向上とトルクリプル低減効果

カテゴリ: 論文誌(論文単位)

グループ名: 【C】電子・情報・システム部門

発行日: 2019/01/01

タイトル(英語): Efficiency Improvement and Torque Ripple Reduction by High-Speed PMSM Drive System Implemented in FPGA

著者名: 安村　昂平（大阪府立大学），井上　征則（大阪府立大学），森本　茂雄（大阪府立大学），真田　雅之（大阪府立大学）

著者名(英語): Kohei Yasumura (Osaka Prefecture University), Yukinori Inoue (Osaka Prefecture University), Shigeo Morimoto (Osaka Prefecture University), Masayuki Sanada (Osaka Prefecture University)

キーワード: 永久磁石同期モータ，高速運転，FPGA，制御周期，直接トルク制御　　permanent magnet synchronous motor (PMSM)，high-speed drive，field programmable gate array，control period，direct torque control (DTC)

要約(英語): Permanent magnet synchronous motors (PMSMs) have been used in numerous applications due to their many attractive characteristics, such as high power, high efficiency, and wide operating-speed range. Moreover, high-speed PMSM drive systems are used in various applications. In recent years, such systems have become much smaller and have come to have a higher power density. Because of the increase in the motor fundamental frequency in the high-speed region, it is necessary to reduce the control period. Conventionally, digital signal processors and microcomputers have been used for high-performance processers. The field-programmable gate array (FPGA) which is a logic-integrated circuit can also reduce the control period simply because of fast hardware performance. This paper proposes a high-speed PMSM drive system based on direct torque control (DTC) implemented in an FPGA. In this paper, the operating characteristics of the proposed system using a PMSM having a rated speed of 42,000 min-1 are showed. Furthermore, the effects of efficiency improvement and torque ripple reduction are examined experimentally.

本誌: 電気学会論文誌C（電子・情報・システム部門誌） Vol.139 No.1 （2019） 特集：電子回路関連技術

本誌掲載ページ: 106-112 p

原稿種別: 論文／日本語

電子版へのリンク: https://www.jstage.jst.go.jp/article/ieejeiss/139/1/139_106/_article/-char/ja/